Project EPT_HET_DIGITAL_PQM_v01

10 layers rigid PCB, 8mil/8mil rules, 0.4mm vias

Size: 100x120 mm
Board thickness: 1.60 mm.
Soldermask for TOP and BOTTOM 
 -- NO silk ---


Layer order:

 1: Layer_1_TOP.gbr              
 2: Layer_2_GND_DIGITAL_FPGA_1.gbr
 3: Layer_3_GND_DIGITAL_FPGA_2.gbr
 4: Layer_4_VCC_DIGITAL_FPGA.gbr
 5: Layer_5_VCC_ANALOG_FPGA.gbr
 6: Layer_6_GND_ANALOG_FPGA.gbr
 7: Layer_7_VCC_ANALOG_6V.gbr
 8: Layer_8_VCC_ANALOG_6V_RETURN.gbr
 9: Layer_9_CHASSIS.gbr
10: Layer_10_BOTTOM.gbr          

drill.gbr           drill file
milling.gbr         milling file

top_solder_msk.gbr  top soldermask
bot_solder_msk.gbr  bottom soldermask